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Implementation of cryptographic algorithms on the FPGA platform
Zugárek, Adam ; Sládok, Ondřej (referee) ; Smékal, David (advisor)
This bachelor’s thesis describes methods of data encryption and author’s own implementation on FPGA. The goal of this thesis is to implement cipher on a hardware accelerated network card COMBO. In the introduction is described encryption using block ciphers. Cipher AES was chosen to implement, which is famous and most using cipher. Its detailed description is described in the first part of the thesis. In the second part is described the author’s own implementation of AES cipher in VHDL. In the next part is method of interconnecting the resulting program with a framework of the FPGA card – NetCOPE. Achieved results are in the end of this thesis. The resulting program cannot encrypt network communication. It only transforms data stored in the card, which then send to host computer.
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Electric guitar combo design
Obr, Viktor ; Šebesta, Jiří (referee) ; Dušek, Martin (advisor)
The text of this bachelor´s thesis describes designing a construction of electric guitar combo. The first part of the project deals with history of guitar amplifiers and theory of design of individual components. The second part includes actual designs of guitar effect units (fuzz and tremolo), correction preamplifier, power amplifier with integrated circuit TDA7293V, power supplies for all components and choice of speakers for guitar combo. All effect units and preamplifier are also simulated in PSpice. In the last part there are results of measurements of all components and the whole combo.
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Netdev Driver for Acceleration COMBO Cards
Tran, Dominik ; Vrána, Roman (referee) ; Kučera, Jan (advisor)
This thesis deals with the development of the network device driver for the FPGA network COMBO cards, which should enable receiving and sending packets through standard network interface of Linux kernel. CESNET is developing a device called DDoS Protector for protection against an amplification (D)DoS attacks, which uses COMBO cards to achieve high performance. A SZE2 interface is used for high speed transfers of network data between COMBO card and a controlling software application, using technique of bypassing kernel network stack and other methods. DDoS Protector has to support standard network protocols, whose implementation directly on top of the SZE2 is very difficult. Instead, using kernel network stack, which is, by default, bypassed to achieve high performance, is much easier to implement and supports all sorts of protocols. Creation of the network device driver enables us to use kernel network stack and other network applications for COMBO cards. Based on the study of SZE2 interface and driver development, I designed and then successfully implemented network device driver. Driver was tested to ensure standard protocols work. It was also tested from the performance point of view. I have also developed the same type of driver for the newer interface - NDP and an application for an accelerated packet forwarding, both of which are functional and were not part of the thesis specification.
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Design and construction of a tube guitar amplifier
Šona, Štěpán ; Dvořák, Jan (referee) ; Kubánek, David (advisor)
The text of this bachelor’s thesis deals with the design, simulation and construction of a tube amplifier for electric guitar, based on the well-known guitar amplifier VOX AC 30. The theoretical part deals with the design and simulation of the original circuit. Subsequently, adjustments were made on both channels and simulated. The practical part of the work already deals with the construction itself, measuring the finished guitar combo. Frequency modulus characteristics, harmonic distortion, spectra and time courses of signals for distorted and clear channel were measured. Then the measurement was evaluated.
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OVS Acceleration Using FPGA Acceleration Card
Vido, Matej ; Martínek, Tomáš (referee) ; Kořenek, Jan (advisor)
The performance of the virtual switch Open vSwitch (OVS) is insufficient to satisfy the current requirements for link bandwidth of the server connections. There is an effort to accelerate the OVS both in the software and in the hardware by offloading the datapath to the smart network interface cards. In this work the COMBO card for 100G Ethernet developed by CESNET is used to accelerate the OVS. The suggested solution utilizes the firmware for FPGA generated from the definition in the P4 language to classify the packets in the card and DPDK for the data transfers and offloading the classification rules into the card. Forwarding of one flow with the shortest frames from physical to physical interface using one CPU core reaches forwarding rate of 11.2 Mp/s (10 times more than the standard OVS) with classification in the card and 5.9 Mp/s without classification in the card.
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Virtualization of I/O Operations in Computer Networks
Remeš, Jan ; Martínek, Tomáš (referee) ; Matoušek, Denis (advisor)
This work deals with virtualization of computer systems and network cards in high-speed computer networks, and describes implementation of the SR-IOV virtualization technology support in the COMBO network card platform. Various approaches towards network card virtualization are compared, and the benefits of the SR-IOV technology for high performance applications are described. The work gives overview of the COMBO platform and describes design and implementation of the SR-IOV technology support for the COMBO platform. The work concludes with measurement and analysis of the implemented technology performance in virtual machines. The result of this work is the COMBO cards' support for the SR-IOV technology, which makes it possible to use them in virtual machines with wire-speed performance preserved. This allows future COMBO cards to be used as accelerators in the networks utilizing the Network Function Virtualization.
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Self Test of FlowMon Probe
Ivančo, Daniel ; Kořenek, Jan (referee) ; Kaštil, Jan (advisor)
Aim of this bachelor thesis is to design and implement self test of FlowMon probe. Which is a device monitoring network traffic based on IP flows, developed by Liberouter project team. The thesis includes theories of testing and test categories the self test is related to. There is also a brief description of network monitoring by NetFlow protocol and description of FlowMon probe architecture. Furthermore, the thesis contains the self test design and its description. Final solution consist of two programs. The first one implements packet generator creating all types of required packets and flows used by the second one, which implements the self test itself.
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Packet generator on the FPGA platform
Bari, Lukáš ; Blažek, Petr (referee) ; Smékal, David (advisor)
The thesis deals with the theory and design of the network traffic generator on the FPGA platform. The VHDL programming language is used for the description. The work involves getting acquainted with the development processes and design tools needed to create the overall project. It also includes familiarity with the necessary FPGA, NetCOPE and COMBO cards. Based on this information, was designed, tested and implemented packet generator project for the Combo-80G card. For implementation was used framework from NetCOPE.
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Design and implementation of Twofish cipher on the FPGA network card
Cíbik, Peter ; Martinásek, Zdeněk (referee) ; Smékal, David (advisor)
This bachelor thesis deals with implementation of block cipher Twofish on the FPGA platform in VHDL language. The teoretical introduction explains basics of cryptography and symetric ciphers block operation modes, FPGA platform and introduction to VHDL language. In the next part the Twofish cipher, its components and flow are being dis- cussed in depth. Subsequently describes design of Twofish cipher in VHDL language and induvidual steps in this process. The last part deals with own implementation on hardware card with FPGA chip and summarizes reached goals.
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Hardware-Accelerated Device for Protection Against DoS Attacks
Kuka, Mário ; Kekely, Lukáš (referee) ; Kučera, Jan (advisor)
This thesis deals with the development of a firmware for hardware-accelerated device used as a protection against amplification (D)DoS attacks. In the today's world, (D)DoS attacks are very common and cause significant financial damages. Therefore the goal is to create affordable and easy to deploy centralized device that would resolve this issue. To reach this goal, a hardware accelerator is being used for the high-volume data transfer processing through a single commonly used server. Design and implementation of the firmware had been done considering the fact that this device will be used in the networks with 100\,Gbps speed. The whole system had undergone functional verification and its real throughput was verified within the laboratory testing as well. Created device has been already deployed into the CESNET network infrastructure during the time of the writing of this thesis and it has been tested by the network administrators. Based on the received feedback, the development will continue focusing on expanding of the detection of more types of attacks.
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